Online compilers a Boon

Sitting on a public computer , its is mostly impossible and feasible to install a compiler and start coding . On line compiler websites, is helping me out of these kinda situations .

 These compilers not only check the syntax but also link it for either windows or linux.
http://www.onlinecompiler.net/
Check out if you are in the same kinda situation. hope it helps.

Using CAN on LPC2378 Simplified

I had worked on it last semester .The LPC2378 usermanual and the example codes were very helpful . To get started , one can just modify the example codes without understanding function of all the registers . I have given a basic view of how can one implement a CAN protocol using the CAN controller . I  have not discussed the Acceptance filters and the error management. This should give a good kick start to a CAN based project.

Prototype based on MSP430 : Design Issues

Level conversion is just not enough always for a proper UART communication between two devices working at different standard voltages , normally 3.3V and 5V.

This issue crops up when we try to interface a sensor working at 5V [which generally is the case], to a controller or processor working at 3.3V. In our case , we were using the GSM modem which gives a 5V serial UART output and MSP430 powered at 3.3V.

We understood that we need a MAX232 for proper protocol conversion. Without MAX232 we were getting some deterministic values but not correct ones . The reason i feel is that the logic levels are set as -5V and 5V for uart communication , but as we have matched the ground , there may be problems with required voltage levels not getting matched.

A tip : A debug method i use to check whether the rx lines are connected properly. If you ground the rx pin and pull it out , it must give you an ascii character something like  "???" . That's pretty interesting , we done guys ascii codes + uart combined is intelligent enough to tell us "What the F are you doing ??". So if you are getting values like this probably you have loosely connected to gnd  :p.

Believe me its fun to debug this way if your rx wire is crossing 2-3 boards to reach the destination. 

Protype based on MSP430

Together with my friends, we had participated in the TI MCU contest 2012 . It was a good experience of completing the whole design flow for a prototype within 5-6 days.

A small description of the proposed system. Cargo traking system , consisting of sensors ,like accelerometer, GPS reciever , humidity sensor and temprature sensor, communicates the readings of the sensors in a meaningful way to the customers . A GSM modem is used for communication.

Cleary, GPS , GSM and accelerometer, were the USP's . I would describe a bit about the issues we faced while creating this system using MSP430 Lauchpad provided by Texas Instruments.

GSM modem : If you go through the wiki page of RTS (Ready to send) pin of the RS232 DB9 connector. you will clearly understand that though we use only three wires(Tx, Rx, Gnd) for UART communication it is not always true. modems in perticular  requires additional signals like RTS and CTS according to the application. It is not necessary to dedicate a pin of controller for these signal . As they are just signals to start or stop data transmission, in other words they mere flags . Solution is simple , in  the serial being used , we must send the signal back to the modem[ just short them].

Getting started FPGA board design

This summer i am working with Dr Kota Solomon Raju, Senior Scientist at CEERI, Pilani and my classmate Kunal Kedar on FPGA board design. The aim would be develop a complete understanding of what is required to make a stand alone FPGA system , which can be further used to some application which needs custom peripherals to be interfaced.

We are going to design it for Virtex 5 series . We are currently looking at only 2 packages FF1136 and FF1760. We will be using a Virtex 5 AFX FF1136 Proto board to test the design .

The first task was to understand the pins of the FPGA. Unlike other Integrated circuits , all the data about the FPGA cannot be put into one document . So Xilinx provide different documents addressing different users and aspects . The pin information document is what we are looking at. First we have created a simplified layout of pins considering the similarities of the io banks. It cannot be understood in a single , one needs to do two to three iteration to draw a optimal and meaningful pinout .